Success in this course requires a good working knowledge of
DC circuit principles, especially KVL and KCL. Thevenin and Superposition
theorems are used quite a bit, although mesh and nodal analysis
are generally not used. A basic working knowledge of diodes is
assumed (such as found in chapter 3 of Malvino). AC analysis generally
assumes "mid-band" frequencies, and thus phase is not
usually considered (i.e., no complex impedances as found in ET152 Circuits 2). Math level is mostly algebra,
although some equation proofs do require differential and/or integral
calculus (not required for day-to-day calculations). For lab,
you'll need the standard array of goodies as used in ET151
Circuits 1 and ET153 Intro to Electronics (breadboard, DMM,
small handtools, hook-up leads, etc.) Unless otherwise specified,
all lab exercises require a non-formal
report due no later than one week after the exercise. Late
penalty is one letter grade for the first half week, two letter
grades for the second half week. Reports are not accepted beyond
two weeks and receive a grade of 0. Remember, plagiarism is grounds
for failure.
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1 |
Quick review of diodes on day 1. Introduction to BJT and CE
connection. Basic device parameters alpha and beta, and other
data sheet items. Simple DC BJT model. Need for biasing, simple
biasing circuits (e.g., base bias).
- Reading: Introduction to BJTs (chapter 6).
You should have completed the sections on CE connection, base
and collector curves, reading data sheets, simple base biasing,
and begun the next chapter by week's end.
- Problems: Chapter 6- 3,
5, 7, 11, 15, 17, 25. Chapter 7- 11, 15 (this one takes some
thought)
- Lab: As always, we start the semester with
proper lab safety procedures. Our first experiment will be Exercise
15, The CE Connection. Items to note: Vbe should be
fairly consistent at .7 volts, for all three transistors. Also,
Ic >> Ib. Ic should vary among the three devices since
it is highly unlikely that you'll pull out three with identical
betas. Practical hint: although the main diagram shows two separate
power supplies for Vcc and Vbb, only one supply is required since
they use the same potential. Also, since several current and
voltage measurements are needed for each iteration, it will be
fastest if you dedicate two DMMs to current measurement (leaving
them permanently wired), and a third to measure the various voltages.
(Use one of the Fluke meters along with your own.)
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2 |
This week we begin with DC load lines and examine saturation
limits. We also look at LED driver circuits. Toward the end of
the week we'll be looking at other forms of bias, notably voltage
divider bias.
- Reading: By wednesday, complete chapter
7 through section 7. By week's end, complete sections 8-1 through
8-3.
- Problems: Chapter 7- 21, 27, 29, 35, 37,
39, 43. Chapter 8- 1, 7, 11, 27, 31, 37 (27 is kind of fun actually,
31 definitely requires some thought- don't get discouraged)
- Lab: Exercise 18, LED Drivers.
Items to note: Like last week's lab, although two supplies are
shown, only one is really needed. Don't forget that the first
circuit is in saturation, thus Vce is very small, perhaps .1
volts or so. Vce(sat) can be estimated from the saturation curves
found on data sheets. We will look at how to do this in lab.
Also, do not ignore Vled when computing Ic(sat). A reasonable
value for the LEDs we use in lab is about 2.1 volts (don't
use .7 volts- these are not silicon rectifying diodes!).
Finally, note that circuit two, the non-saturating driver, can
be unstable and might oscillate at high frequencies. This will
throw off the readings on your DMM (it might, for example, indicate
that Ve > Vb). Oscillation can be verified by using the 'scope.
If your circuit oscillates, it can usually be cured by placing
1 uF caps from collector to ground. Make sure that you use good
layout techniques.
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3 |
We continue with biasing and introduce dual-supply emitter
bias and DC coupled circuits. If time permits, we may also look
at collector-feedback bias and emitter-feedback bias.
- Reading: Sections 8-4 through 8-6, curve-tracer
handout for lab.
- Problems: 13, 15, 19 (but use figure 8-23
instead of 8-24 for problem 19). Also, redesign figure 8-23 so
that Ic = 5 mA. Do this two different ways: 1) by changing Re,
2) by changing Vee. Try the DC
Bias Worksheet.
- Lab: Exercise 19, Setting up a Stable
Q Point. Make sure that you measure beta for each transistor,
either by using the curve tracer or by directly measuring base
current (and then computing beta from Ic/Ib). For the lab write-up,
compare the beta spreads versus the Ic spreads. Are the circuits
stable in terms of Ic versus beta?
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4 |
We finish biasing, including PNP devices. Once PNPs are
done, we'll have the first test.
- Reading: Section 8-7.
- Problems: 19, 21, 23, 33.
- Lab: Exercise 20, Biasing PNP Transistors.
Note that circuits 1 and 2 are identical, the power supply has
not been rotated in circuit 2. The only thing which
has changed is the point we call "common". Ultimately,
it's just a question of where to place the black lead of your
voltmeter.
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5 |
We tidy up biasing (going over the test) and introduce AC
models and equivalent circuits. This is where the circuits start
to get interesting. Biasing is sort of like learning how to make
a car engine idle. Now it's time to start driving. We'll spend
the next couple of months looking at small signal and large signal
(i.e., power) amplifier circuits.
- Reading: Finish chapter 9 by friday and
begin chapter 10. Pay attention to section 9-7 since it's a good
overview for future work.
- Problems: 5, 7, 13, 15, 17, 26.
- Lab: Exercise 21, Transistor Bias.
This lab looks at a few of the lesser known biasing schemes.
In your report, rank the circuits of figures 21-1, 21-2, and
21-3 in terms of stability of Ic relative to Beta. To do this,
make sure you measure the Beta of each device (either by measuring
base current or by using the curve tracer). Your discussion should
include a theoretical analysis of why the circuits are ranked
the way they are.
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6 |
Our initial concern involves finding voltage gain, input impedance,
and output impedance for typical voltage divider and dual supply
emitter bias circuits. From here we will also look at the effects
of source impedance and loads, and perhaps examine a few other
biasing types for comparison.
- Reading: Sections 10-1 through 10-4.
- Problems: 1, 3, 5, 7, 11, and start Small Signal Worksheet.
- Lab: Exercise 23, The CE Amplifier.
This is a very good first lab for small signal amplifiers. Make
sure that you pay close attention to both the DC and AC measurements
of table 23-1, noting how Superposition is effectively used for
analysis. This is shown nicely using the oscilloscope in lab
in conjunction with the AC/DC input coupling switch. Also, it
is preferred to use a pair of probes where channel one is fixed
to the signal generator and channel two is used for measurement
of the signal under investigation. By triggering the 'scope from
channel one, you'll always be able to see the magnitude and phase
of the signal relative to the input.
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7 |
We continue with small signal AC analysis, introducing multi-stage
schemes and direct-coupled circuits. If time permits, we will
introduce emitter followers and darlingtons (otherwise, it gets
bounced to next week).
- Reading: Finish chapter 10. Read sections
1, 2, and 4 of chapter 12 by week's end . Try the Monsterrific
Problem.
- Problems: 15, 17, 21, 23 from chapter 10,
also 1, 3, 7, 9 and 15 from chapter 12 and finish problem set
hand-out.
- Lab: Exercise 24, Other CE Amplifiers.
This lab looks at three things: The effect of source resistance
on gain, the effect of load resistance on gain, and the effect
of emitter swamping on gain, distortion, and input impedance.
This lab will be a formal write-up. The first two items
are fairly straight forward, but the section on swamping offers
more than you might think at first glance. First of all, since
you will have measured both the base voltage and the generator
voltage in circuits 24-1 and 24-2, you can calculate an experimental
Zin (just use the voltage divider rule backwards, where one resistor
-Rsource- is known, and the other -Zin- isn't). Since both circuits
have identical DC bias equivalents, you can directly compare
their Zin's. Second, it is possible to see the reduction in distortion
that swamping causes by turning the signal generator up until
the output of the amplifier starts to clip. Do this for both
figure 24-1 and 24-2 and note the shape of the wave right before
clipping occurs.
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8 |
We finish small signal work and have a test (end of
this week or beginning of next). After this, we introduce large
signal amplifiers. (Finally, we get to drive loudspeakers.)
- Reading: Start chapter 11.
- Problems: 3, 7, 11, 13, 15, 19.
- Lab: Exercise 28, The Emitter Follower.
The basic idea of any voltage follower is one of load matching.
Although a follower doesn't have any voltage gain (ideally unity),
it does have current gain, and thus, power gain. Therefore, a
high impedance source can be connected to a low impedance load
without undue loss.
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9 |
We begin detailed work on class A amplifiers including AC
load lines, load power, device ratings, efficiency, etc.
- Reading: Complete sections 1 through 3 and
7 of chapter 11.
- Problems: 36, 37, 41, 43, 45, 47.
- Lab: Common Base Amplifier. This
is a hand-out and is not in your lab manual. Make sure you read
through it before lab.
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10 |
We finish class A and start class B amplifiers. We pay particular
attention to its advantages and disadvantages relative to class
A operation.
- Reading: Section 4 of chapter 11, sections
5 and 6 of chapter 12.See Class
B Power Proof.
- Problems: 19, 22, 23, 25, 35, 37.
- Lab: Exercise 26, Class A Amplifiers. This
lab looks at basic class A amplifiers and includes an examination
of load power, device power, supplied power, and efficiency.
It is important to note how low the efficiency is (for this circuit,
well below the 25% theoretical maximum). Also, note how difficult
it is to get a precise reading on the compliance due to the increase
in distortion. It can be very instructive to take a little side
trip here to investigate the effects of emitter degeneration
(i.e., swamping). Simply replace the 1.8k emitter resistance
with a 1.5k + 330 combo, bypassing only the 1.5k. Although the
gain will drop considerably, the class A distortion will drop
dramatically, allowing a much more accurate viewing of compliance
and clipping.
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11 |
Work on class B is wrapped up, including circuits utilizing
direct coupled drivers and loads. We have a test on power
amplifiers (end of this week or possibly the next).
- Reading: Finish chapter 12.
- Problems: 36, 38, 39, 41, power amplifier
problem set hand-out.
- Lab: Exercise 29, Class B Push-Pull
Amplifiers. This is the class B output section most commercial
amplifiers are based on. Pay particular attention to the bias
stability gained by using a diode type bias. Also, note that
notch distortion effects (i.e., crossover distortion) get worse
as the signal is reduced (the exact opposite of what is seen
with class A non-linearities).
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12 |
We begin Field Effect transistors, first with how JFETs differ
from BJTs, and then we launch into JFET biasing.
- Reading: Start chapter 13.Here is a copy
of the Self-Bias Curve.
- Problems: 1, 3, 5, 7, 9, 11, 13, 15, 19.
- Lab: Exercise 31, An Audio Amplifier.
This is a very useful design, complete with a class A direct
coupled driver. We will be altering this lab quite a bit, adding
both microphones and loudspeakers.
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13 |
JFET biasing is completed and AC amplifiers are introduced.
- Reading: Complete up through section 7 of
chapter 13.
- Problems: 17, 21, 23, 25, 27, 31,
33, 35 (hint: think constant current source).
- Lab: Exercise 32, JFET Bias. Unlike
BJTs, FET biasing can be somewhat "trouble-some". The
reason is because we don't have a nice fixed .7 volt drop to
rely on in one of the loops. Instead, since FETs have a reverse
biased gate-source, Vgs is rather flexible and can be anywhere
from 0 down to Vgs(off) (perhaps as low as -8 volts in some popular
devices). As it turns out, absolute stability of Id is not generally
required. Unlike BJTs, the gain characteristic (i.e., gm) will
not be perfectly stable if the current is stable. For highest
gain stability, some fluctuation of Id is in fact desired.
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14 |
We finish JFETs and start with MOSFET circuitry, paying attention
to the differences between MOSFETs and JFETs.
- Reading: Start chapter 14.
- Problems: 1, 3, 7, 17, 19. Try the FET
problem set handout
- Lab: Exercise 33, JFET Amplifiers.
Here we look at basic voltage amplifiers (common source topology)
and source followers (common drain topology). Note how low the
gains are when compared to their BJT counterparts. Of course,
the FETs counter this by have much larger input impedance values.
Zin can be loosely found through the voltage divider effect by
placing a "sense" resistor in line with the gate terminal
(try a 220k for starters).
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15 |
We wrap up with MOSFETs and look at a few interesting FET
applications. Time permitting, we have our last in-class test.
- Reading: Finish chapter 14, also sections
8 and 9 of chapter 13.
- Problems: 21, 23, 29.
- Lab: Exercise 34, JFET Applications.
This lab examines a few neat uses for FETs outside the realm
of normal amplifiers. These include analog switches (very good
for remote noiseless switching), voltage variable resistance
(useful in making voltage controlled amplifiers and filters,
and similar devices), and choppers (a basic building block in
low drift amplifier circuits).
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